Interrupt Handling System
Overview
The FreeWorld OS interrupt handling system provides complete support for hardware interrupts and CPU exceptions, with both legacy PIC and modern APIC/IOAPIC support.
Components
IDT (Interrupt Descriptor Table)
The IDT is a 256-entry table that defines interrupt handlers for all interrupts and exceptions:
- Exception Handlers (0-31): All 32 CPU exceptions are handled
- Interrupt Handlers (32-255): Hardware interrupts and software interrupts
- IST Support: Interrupt Stack Table for critical exceptions (double fault, machine check)
- Ring Levels: Support for both Ring 0 (kernel) and Ring 3 (user) interrupts
Exception Handlers
Complete exception handling for all CPU exceptions:
- Exception 0: Divide by Zero
- Exception 1: Debug
- Exception 2: Non-Maskable Interrupt
- Exception 3: Breakpoint (INT3)
- Exception 4: Overflow
- Exception 5: Bound Range Exceeded
- Exception 6: Invalid Opcode
- Exception 7: Device Not Available
- Exception 8: Double Fault (with error code)
- Exception 10: Invalid TSS (with error code)
- Exception 11: Segment Not Present (with error code)
- Exception 12: Stack Segment Fault (with error code)
- Exception 13: General Protection Fault (with error code)
- Exception 14: Page Fault (with error code, integrated with virtual memory)
- Exception 16: x87 FPU Error
- Exception 17: Alignment Check (with error code)
- Exception 18: Machine Check (with error code)
- Exception 19: SIMD Floating Point Exception
- Exception 20: Virtualization Exception
APIC Support (Primary - UEFI-Aware)
Modern Advanced Programmable Interrupt Controller support using ACPI-discovered addresses:
- I/O APIC: System-wide interrupt controller (base address from ACPI MADT)
- Local APIC: Per-CPU interrupt controller (base address from ACPI MADT)
- UEFI Initialization:
io_apic_init_uefi()uses ACPI addresses - Legacy PIC Disabled: Legacy 8259 PIC is disabled (not used)
- IRQ Routing: Dynamic IRQ routing and redirection
- IPI Support: Inter-Processor Interrupts for SMP
- APIC Timer: Local APIC timer configuration
- EOI Handling: End of Interrupt acknowledgment
UEFI Migration: I/O APIC and Local APIC base addresses are discovered from ACPI MADT table. Legacy PIC is completely disabled in modern systems.
Legacy PIC Support (Deprecated)
⚠️ Deprecated: Legacy 8259 PIC support is no longer used. Modern systems use I/O APIC exclusively.
- ⚠️ PIC Remapping: Not used (PIC is disabled)
- ⚠️ IRQ Management: Not used (I/O APIC handles all interrupts)
- ⚠️ EOI Handling: Not used (APIC EOI is used instead)
Features
- Complete IDT setup (256 entries)
- All 32 CPU exceptions handled
- Error code handling for applicable exceptions
- Exception statistics tracking
- Critical exception detection and handling
- Page fault integration with virtual memory system
- Local APIC initialization and configuration
- I/O APIC enumeration from ACPI MADT
- IRQ handler registration
- Thread-safe interrupt handling
- Legacy PIC fallback support
Implementation
Total Lines of Code: ~1,330 lines
kernel/interrupts/idt.asm(~200 lines) - IDT setupkernel/interrupts/exceptions.asm(~400 lines) - Exception handlerskernel/interrupts/apic.asm(~450 lines) - APIC supportkernel/interrupts/irq_apic.asm(~150 lines) - APIC IRQ handlingkernel/acpi/ioapic.asm(~130 lines) - I/O APIC enumeration
Integration
The interrupt handling system is integrated with:
- Kernel initialization sequence
- ACPI system (for I/O APIC discovery)
- Virtual memory system (page fault handler)
- Debugging system (breakpoint exceptions)