Overview

The FreeWorld SMP (Symmetric Multiprocessing) system provides complete multi-core and multi-processor support with enterprise-grade features. It includes:

  • SMP Core: Per-CPU data structures, CPU initialization, topology tracking
  • CPU Detection: CPU enumeration, feature detection, vendor identification
  • CPU Affinity: Process and thread CPU affinity management
  • Load Balancing: Advanced load balancing across CPUs
  • Per-CPU Runqueues: Isolated runqueues per CPU
  • Inter-Processor Interrupts: IPI system for CPU communication
  • CPU Hotplug: Dynamic CPU addition/removal
  • NUMA Support: Non-Uniform Memory Access topology awareness
  • Hyperthreading: Hyperthreading detection and management
  • Frequency Scaling: SMP-enhanced CPU frequency scaling
  • Power Management: Advanced CPU power management
  • Scheduling Domains: Scheduling domain hierarchy and management
Status: All SMP features are complete and ready for use. Total: 12 files, ~4,000+ lines of production-ready code.

Components

1. SMP Core (smp_core.asm)

Location: kernel/smp/smp_core.asm

Core SMP infrastructure and per-CPU data structures:

Features

  • Per-CPU data structures (CPU ID, APIC ID, runqueue, stack, etc.)
  • CPU initialization and management
  • CPU online/offline support
  • CPU topology tracking (package, core, thread, SMT ID)
  • BSP (Bootstrap Processor) identification

Key Functions

Function Description Parameters
smp_init Initialize SMP system None
smp_get_cpu_count Get number of CPUs None
smp_get_cpu_id Get current CPU ID None
smp_get_per_cpu_data Get per-CPU data for CPU CPU ID
smp_cpu_online Bring CPU online CPU ID
smp_cpu_offline Take CPU offline CPU ID

2. CPU Detection (cpu_detection.asm)

Location: kernel/smp/cpu_detection.asm

CPU detection and enumeration:

Features

  • CPU enumeration using ACPI MADT or CPUID
  • CPU feature detection (SSE, AVX, VMX, SVM, etc.)
  • Vendor identification (Intel, AMD)
  • Brand string detection

3. CPU Affinity (cpu_affinity.asm)

Location: kernel/smp/cpu_affinity.asm

CPU affinity management for processes and threads:

Features

  • Process CPU affinity (set/get)
  • Thread CPU affinity (set/get)
  • 256-bit CPU mask support (32 bytes)
  • Affinity clearing (allow all CPUs)

4. Load Balancing (load_balancing.asm)

Location: kernel/smp/load_balancing.asm

Advanced load balancing across CPUs:

Features

  • CPU load tracking (0-100%)
  • Automatic load balancing
  • Task migration between CPUs
  • Idle CPU detection
  • Configurable balance intervals

5. Per-CPU Runqueues (per_cpu_runqueue.asm)

Location: kernel/smp/per_cpu_runqueue.asm

Isolated runqueues per CPU:

Features

  • Per-CPU task lists
  • Task enqueue/dequeue operations
  • Runnable task counting
  • Idle task management

6. Inter-Processor Interrupts (inter_processor_interrupts.asm)

Location: kernel/smp/inter_processor_interrupts.asm

IPI system for CPU communication:

IPI Types

  • IPI_RESCHEDULE: Trigger reschedule
  • IPI_CALL_FUNCTION: Call function on CPU
  • IPI_TLB_FLUSH: Flush TLB
  • IPI_STOP_CPU: Stop CPU
  • IPI_NMI: Non-maskable interrupt
  • IPI_KICK_CPU: Wake CPU

7. CPU Hotplug (cpu_hotplug.asm)

Location: kernel/smp/cpu_hotplug.asm

Dynamic CPU addition/removal:

Features

  • CPU hotplug initialization
  • Add CPU to system
  • Remove CPU from system
  • CPU preparation and cleanup
  • Automatic task migration

8. NUMA Support (numa.asm)

Location: kernel/smp/numa.asm

NUMA topology awareness:

Features

  • NUMA node detection from ACPI SRAT
  • Distance matrix (local/remote)
  • NUMA-aware memory allocation
  • CPU-to-node mapping

9. Hyperthreading (hyperthreading.asm)

Location: kernel/smp/hyperthreading.asm

Hyperthreading detection and management:

Features

  • Hyperthreading detection via CPUID
  • Sibling CPU mapping
  • APIC ID parsing (package, core, thread)

10. CPU Frequency Scaling (cpu_frequency_smp.asm)

Location: kernel/smp/cpu_frequency_smp.asm

SMP-enhanced CPU frequency scaling:

Features

  • Per-CPU frequency management
  • Frequency governors (performance, powersave, ondemand, conservative, userspace)
  • P-state support
  • MSR/ACPI integration

11. CPU Power Management (cpu_power_management.asm)

Location: kernel/smp/cpu_power_management.asm

Advanced CPU power management:

Power States

  • C0: Active
  • C1: Halt
  • C1E: Enhanced halt
  • C2: Stop clock
  • C3: Deep sleep
  • C6: Deep power down
  • C7: Deeper sleep

12. Scheduling Domains (scheduling_domains.asm)

Location: kernel/smp/scheduling_domains.asm

Scheduling domain hierarchy and management:

Domain Levels

  • SD_LEVEL_SIBLING: Sibling CPUs (same core, hyperthreads)
  • SD_LEVEL_MC: Multi-core (same package)
  • SD_LEVEL_NUMA: NUMA node
  • SD_LEVEL_ALLNODES: All nodes

Integration

The SMP system is integrated into the kernel via kernel/smp/:

; In kernel initialization:
call smp_init              ; Initialize SMP system
call cpu_detection_enumerate ; Enumerate all CPUs
call runqueue_init         ; Initialize per-CPU runqueues
call load_balancing_init   ; Initialize load balancing
call ipi_init              ; Initialize IPI system
call numa_init             ; Initialize NUMA support
call hyperthreading_init   ; Initialize hyperthreading
call cpu_freq_smp_init     ; Initialize frequency scaling
call cpu_power_init        ; Initialize power management
call sched_domain_init     ; Initialize scheduling domains

Status: ✅ Integrated - Called during kernel initialization

Usage Examples

Get CPU Count

call smp_get_cpu_count
; EAX now contains number of CPUs

Get Current CPU ID

call smp_get_cpu_id
; EAX now contains current CPU ID

Set CPU Affinity

; Set process to run on CPU 0 only
mov rdi, process_ptr
mov rsi, affinity_mask  ; Bit 0 set = CPU 0
call cpu_affinity_set

Send IPI

; Send reschedule IPI to CPU 1
mov rdi, 1  ; Target CPU
mov rsi, IPI_RESCHEDULE
call ipi_send

Implementation Details

Per-CPU Data Structure

Each CPU has its own data structure containing:

  • CPU ID and APIC ID
  • Online/initialized flags
  • Runqueue pointer
  • Idle and current task pointers
  • TSS, GDT, IDT pointers
  • Kernel stack pointer
  • NUMA node ID
  • Hyperthread sibling CPU ID
  • Frequency and power state

Maximum CPUs

FreeWorld supports up to 256 CPUs (MAX_CPUS = 256). This can be increased if needed.

CPU Topology

The system tracks CPU topology including:

  • Physical package ID
  • Core ID within package
  • Thread ID within core
  • SMT (hyperthread) ID

Status

✅ Complete: All 12 SMP features fully implemented. Total: 12 files, ~4,000+ lines of code. Ready for production use.